Platform for the Development of Image Processing Applications on Xilinx SoC FPGAs

Abstract

The use of image processing systems is becoming frequent and is appropriate in edge computing. However, the demands on power consumption and high performance prevent the use of standard processing platforms. Thus, FPGAs are a good option for the development of computer vision systems because they are capable of exploiting parallelism. On the other hand, the design flow of current FPGA synthesis tools supports high-level languages as input descriptions, in contrast to hardware description languages. High-level synthesis (HLS) automates the design process by transforming an algorithmic description into digital hardware meeting design limitations. However, image processing experts may find challenging the hardware integration with the rest of the system components, e.g. capture and display interfaces. This work presents a basic design for the construction of image processing applications based on Zynq and a guide for its use, which solves this problem, allowing the agile generation of embedded image processing solutions. Additionally, a methodology is provided, which facilitates the efficient development of image processing embedded solutions in an agile way.

Keywords

• procesamiento de imágenes
• hls
• zynq