Small Feature‐Size Transistors Based on Low‐Dimensional Materials: From Structure Design to Nanofabrication Techniques

Abstract

Abstract For several decades after Moore's Law is proposed, there is a continuous effort to reduce the feature‐size of transistors. However, as the size of transistors continues to decrease, numerous challenges and obstacles including severe short channel effects (SCEs) are emerging. Recently, low‐dimensional materials have provided new opportunities for constructing small feature‐size transistors due to their superior electrical properties compared to silicon. Here, state‐of‐the‐art low‐dimensional materials‐based transistors with small feature‐sizes are reviewed. Different from other works that mainly focus on material characteristics of a specific device structure, the discussed topics are utilizing device structure design including vertical structure and nano‐gate structure, and nanofabrication techniques to achieve small feature‐sizes of transistors. A comprehensive summary of these small feature‐size transistors is presented by illustrating their operation mechanism, relevant fabrication processes, and corresponding performance parameters. Besides, the role of small feature‐size transistors based on low‐dimensional materials in further reducing the small footprint is also clarified and their cutting‐edge applications are highlighted. Finally, a comparison and analysis between state‐of‐art transistors is made, as well as a glimpse into the future research trajectory of low dimensional materials‐based small feature‐size transistors is briefly outlined.

Keywords

• nanofabrication
• nano‐gate transistors
• small feature‐size transistors
• vertical transistors