Structure Optimization of Planar Nanoscale Vacuum Channel Transistor
Ji Xu,
Congyuan Lin,
Yu Li,
Xueliang Zhao,
Yongjiao Shi,
Xiaobing Zhang
Affiliations
Ji Xu
School of Electronic and Information Engineering, Nanjing University of Information Science and Technology, Nanjing 210044, China
Congyuan Lin
School of Electronic and Information Engineering, Nanjing University of Information Science and Technology, Nanjing 210044, China
Yu Li
School of Electronic and Information Engineering, Nanjing University of Information Science and Technology, Nanjing 210044, China
Xueliang Zhao
School of Electronic and Information Engineering, Nanjing University of Information Science and Technology, Nanjing 210044, China
Yongjiao Shi
Joint International Research Laboratory of Information Display and Visualization, School of Electronic Science and Engineering, Southeast University, Nanjing 210096, China
Xiaobing Zhang
Joint International Research Laboratory of Information Display and Visualization, School of Electronic Science and Engineering, Southeast University, Nanjing 210096, China
Due to its unique structure, discoveries in nanoscale vacuum channel transistors (NVCTs) have demonstrated novel vacuum nanoelectronics. In this paper, the structural parameters of planar-type NVCTs were simulated, which illustrated the influence of emitter tip morphology on emission performance. Based on simulations, we successfully fabricated back-gate and side-gate NVCTs, respectively. Furthermore, the electric properties of NVCTs were investigated, showing the potential to realize the high integration of vacuum transistors.
