Advances in Electrical and Computer Engineering (Aug 2019)

Compiler Optimization on Instruction Scheduling for a Specialized Real-Time Floating Point Soft-Core Processor

  • KIRCHHOFF, M.,
  • WAGNER, L.,
  • FENGLER, W.

DOI
https://doi.org/10.4316/AECE.2019.03007
Journal volume & issue
Vol. 19, no. 3
pp. 57 – 68

Abstract

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This paper presents the authors' research in the field of specialized optimizing assembly language compilers for embedded real-time soft-core processor systems on FPGAs. With this soft-core processor, we are targeting a highly specialized field of applications that require large floating-point precision and other unique characteristics. Therefore, a specialized optimizing assembly language compiler is necessary in order to provide the needed machine code and optimize it in a way that efficient usage of the internal parallelism mechanisms is possible, resulting in major performance benefits on single-core, multi-core and vector processors. One important key feature is the design-time analyzability to meet the hard real-time constraints of any given problem.

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