MODEL OF EVALUATING THE LEVEL OF PARASITIC PHASE FLUCTUATIONS IN THE OUTPUT SIGNAL OF THE FREQUENCIES SYNTHESIZER

Abstract

The article describes the actual problem of calculating the level of parasitic fluctuations of the phase of the output signal of the frequency synthesizer of indirect synthesis based on phase-locked loop. The basis for constructing a polynomial model is the model of output noise distribution based on the Leeson generator principle. The described principles of operation of frequency synthesizers with a divider with a fractionally variable division factor allow us to understand the nature of the appearance of the so-called shot noise. The analysis of the characteristics of all the elements included in the frequency synthesizers makes it possible to ensure that the noise components of each individual unit can be represented as a polynomial. The possibility of using the developed polynomial model for estimating the noise level in frequency synthesizers at the stage of selecting the structure of the proposed implementation structure is proposed. As a demonstration of the adequacy of theoretical calculations, the results of phase noise simulation by the polynomial method for all circuit components are presented, as well as a comparison of the results obtained with the simulation of a similar frequency synthesizer in the «ADIsimPLL» simulation package from Analog Devices. Such a simulation allows not only to obtain the level of side components in the spectrum of the output signal, but also to estimate the degree of influence of each specific element of the circuit.

Keywords

• frequency synthesizer
• phase noise
• phase-locked loop
• polynomial model
• digital device design