An adaptive‐impedance fault current limiter for accelerating fault current suppression in MMC‐HVDC systems

Abstract

Abstract DC fault clearance is one of the critical issues for the modular‐multilevel‐converter‐based high voltage direct current (MMC‐HVDC) systems. Employing a hybrid DC circuit breaker (H‐DCCB) to isolate the faulty line is a typical method to achieve fast fault clearance. However, the H‐DCCB has to interrupt the fault current and absorb the energy up to tens of megawatts in several milliseconds. Through theoretical analysis of the interruption process using the H‐DCCB, reducing the equivalent inductance of the fault circuit during the fault falling stage is recommended to accelerate the fault current suppression for the H‐DCCBs. This paper proposes a novel adaptive‐impedance fault current limiter (AFCL), which contains two coupled DC reactors and an energy absorption branch (EAB). The proposed AFCL can automatically limit the fault current during the current rising stage and works as a DC reactor with a fixed equivalent inductance through a two‐state model analysis. Meanwhile, the AFCL contributes to accelerating the decline of the current by adaptively reducing the inductance of the discharge circuit. Consequently, the fault current suppression time and the energy absorbed by the H‐DCCB are reduced. Simulation case studies and hardware experiments are carried out to verify the performance and practicality of the proposed AFCL.