Improving Physically Unclonable Functions’ Performance Using Second-Order Compensated Measurement

Abstract

In this paper, we study the performance of second-order compensated measurement to generate a multi-bit response in physically unclonable functions (PUFs). The proposed technique is based on a novel second-order compensated measurement generating multiple bits instead of a single bit provided by the conventional compensated measurement. A PUF based on this technique has been proposed and implemented in 40 Artix-7 FPGAs, and its uniqueness and reproducibility have been compared to those of another PUF using the compensated measurement technique. In addition, we demonstrate that the best trade-off between identifiability and computation time performance is obtained when using only two bits. At the same time, the good performance of the technique has been demonstrated, improving the identifiability of a ring oscillator PUF (RO-PUF) between 70 and 90% compared to a RO-PUF that uses conventional compensated measurement. In particular, equal error rates (EER) of the order of EER∼10−16 can be achieved by combining the sign bit with another bit extracted using the proposed technique; and up to EER∼10−19 by using one more extra bit. In addition, the high reliability of the responses generated by this technique against possible temperature and voltage variations has been proved. These results show how this new technique improves the performance of the PUF in terms of identifiability, so it can be effectively used for device identification purposes.

Keywords

• compensated measurement
• cryptographic primitive
• FPGA
• hardware security
• physically unclonable functions
• ring oscillator