Reduced Switch Count in Space Vector PWM for Three-Level NPC Inverter

Ryszard Beniak; Krzysztof Górecki; Piotr Paduch; Krzysztof Rogowski

doi:10.3390/en13225945

Energies (Nov 2020)

Reduced Switch Count in Space Vector PWM for Three-Level NPC Inverter

Ryszard Beniak,
Krzysztof Górecki,
Piotr Paduch,
Krzysztof Rogowski

Affiliations

Ryszard Beniak: Faculty of Electrical Engineering, Automatic Control and Informatics, Opole University of Technology, 45-758 Opole, Poland
Krzysztof Górecki: Faculty of Electrical Engineering, Automatic Control and Informatics, Opole University of Technology, 45-758 Opole, Poland
Piotr Paduch: Faculty of Electrical Engineering, Automatic Control and Informatics, Opole University of Technology, 45-758 Opole, Poland
Krzysztof Rogowski: Faculty of Electrical Engineering, Automatic Control and Informatics, Opole University of Technology, 45-758 Opole, Poland

DOI: https://doi.org/10.3390/en13225945
Journal volume & issue: Vol. 13, no. 22
p. 5945

Abstract

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The aim of this paper is to present the real-time implementation and measurements of a reduced switch count in space vector pulse width modulation for three-level neutral point clamped inverters (3L-NPC). We implement space vector pulse width modulation, which uses a prediction algorithm to reduce the number of switches in power transistors (switch count) by up to about 13%. The algorithm applies additional redundant voltage vectors. The method is compute-intensive and was implemented on a dual-core TMS320F28379D digital signal controller. The latest measurements of steady and dynamic states of electric drive, powered by a 3L-NPC inverter using this method, confirmed the possibility of using this method in practical implementation. The implementation and results of the measurements are presented in this paper.

Published in Energies

ISSN: 1996-1073 (Online)
Publisher: MDPI AG
Country of publisher: Switzerland
LCC subjects: Technology
Website: http://www.mdpi.com/journal/energies

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