Design of exact reduct rough set hardware accelerator for early-stage diabetes risk prediction

Abstract

Diabetes is a prevalent, chronic metabolic disorder worldwide. Detecting and predicting risks early are vital for timely intervention. In this paper, the design and implementation of an Exact Reduct Rough Set Hardware Accelerator is presented for early-stage diabetes risk prediction. The proposed hardware accelerator leverages the principles of Rough Set theory to identify essential features or attributes (reducts) from a large dataset that effectively predict the risk of diabetes at an early stage. The architecture of the hardware accelerator is optimized to efficiently handle large datasets commonly encountered in medical applications. It includes modules for data preprocessing, discernibility, matrix computation, and reduct determination. The proposed design is implemented on SPARTAN -6 Field Programmable Gate Array; it works on 100 MHz and supports 3 stages pipelining. The extensive experimentation, employing a comprehensive dataset of diabetes patients, unequivocally demonstrates the hardware accelerator's superior performance compared to traditional methods and software-based implementations. The Exact Reduct Rough Set Hardware Accelerator provides a powerful tool for medical professionals to identify patients at risk early on, enabling timely interventions and personalized care to improve patient health outcomes. The proposed accelerator contributes to the growing field of medical decision support systems and holds promise for broader applications in healthcare and beyond. The findings from this study can be seamlessly incorporated into the system-on-chip platform, contributing to the creation of intelligent tools for monitoring and managing diabetes. By offloading rough set computations to hardware accelerators on the wearable device, the data does not need to be continuously transmitted to external servers for analysis, ensuring user privacy and reducing communication overhead.

Keywords

• Exact reduct
• Field-programmable gate array
• Hardware accelerator
• Rough set modules
• Discernibility matrix
• Classification