Effect of ALD Processes on Physical and Electrical Properties of HfO₂ Dielectrics for the Surface Passivation of a CMOS Image Sensor Application

Abstract

The surface passivation of a CMOS image sensor (CIS) is highly beneficial for the overall improvement of a device performance. We employed the thermal atomic layer deposition (T-ALD) and plasma enhanced (PE-ALD) techniques for the deposition of 20 nm HfO2 as well as stacked with 3 and 5 nm Al2O3 thin films. The HfO2/Si and Al2O3/HfO2/Si metal-oxide-semiconductor structures were used to analyze the fixed charge density ( $\text{Q}_{\mathrm {f}}$ ) and interface trap density ( $\text{D}_{\mathrm {it}}$ ). The as-synthesized samples show high $\text{D}_{\mathrm {it}}$ and $\text{Q}_{\mathrm {f}}$ values (1012 cm−2eV−1) and a minority carrier lifetime of 15–300 $\mu \text{s}$ . The finite-difference time-domain simulation of high-k dielectrics confirmed that the Al2O3 (top)/HfO2 stacked structures expected higher quantum efficiency for CIS application. The effect of vacuum annealing (VA) and forming gas annealing (FGA) treatments succeeded with the decomposition of the $\text{D}_{\mathrm {it}}$ and increase in carrier lifetime. The H2 ambient FGA samples showed a remarkable decrease in the $\text{D}_{\mathrm {it}}$ values. To improve the overall performance of the device after passivation, we employed an Al2O3/HfO2 bilayer structure, which showed a low $\text{D}_{\mathrm {it}}$ of 1011 cm−2eV−1 and a minority carrier lifetime of $\sim 3$ ,700 $\mu \text{s}$ after 400 °C and 30 min FGA. We believe that this surface passivation strategy will pave way for future CIS technology regarding the development of lower defective surface and superior performance.

Keywords

• Atomic layer deposition
• carrier lifetime
• CMOS image sensor
• surface passivation
• forming gas
• HfO₂