RLS adaptive filter co-design for de-noising ECG signal

Abstract

Doctors diagnose various heart muscle disorders by continuously analyzing ELECTROCARDIOGRAM (ECG) signals. Obtaining a noise-free ECG recording is difficult due to various types of interference, making an effective filter essential for accurate diagnosis. This paper introduces a novel, low-complexity filter designed to enhance ECG signal quality. The proposed method involves partitioning the implementation of the Recursive Least Squares (RLS) adaptive filter between a Microblaze soft processor and hardware resources within a Field Programmable Gate Array (FPGA). The hardware component is responsible for creating a Finite Impulse Response (FIR) filter, while the adaptive processing is handled by the soft processor. This configuration makes the filter adaptable, allowing it to work with various algorithms for a wide range of applications. The co-design was tested for ECG noise removal, achieving an average Signal-to-Noise Ratio (SNR) improvement of 89.78 %. Offloading adaptive tasks to the soft processor reduced power consumption by 56.2 %, making it suitable for integration with ECG sensors in wearable body networks.

Keywords

• Electrocardiogram
• Adaptive algorithm
• Co-design
• FPGA
• Soft processor