Novel Virtual Vector SVPWM Method to Mitigate Low-Frequency Common Mode Voltage for Four-Level NPC Inverters

Abstract

This paper proposes a novel virtual vector space vector pulse width modulation (SVPWM) method called Average Zero common mode voltage (AZCMV) PWM to mitigate low-frequency CMV in four-level neutral point clamped (4L-NPC) inverters. Due to the absence of zero CMV vectors in the space vector diagram (SVD) of 4L inverter, the proposed SVPWM method introduces virtual average zero CMV vectors, which are the combination of active vectors, and have an average CMV of zero. The SVPWM scheme is simply implemented in the transformed two-level (2L) SVD by the aid of base vectors. Then, three types of 2L SVD are presented. Effective and hybrid 2L-SVPWM control strategy based on four nearest vectors SVPWM, symmetrical and asymmetrical SVPWM is proposed to optimize output harmonic and switching losses. With the proposed SVPWM method, the peak-to-peak value of CMV can be reduced to one ninth of the total DC link voltage, which is lower up to five times as compared to the sinusoidal PWM (SPWM). Furthermore, the average value of CMV is zero in a switching sequence. The effectiveness of the proposed method has been verified by simulation and experimental results.

Keywords

• Four-level neutral point clamped inverter (4L-NPC)
• common mode voltage
• virtual vectors
• pulse width modulation