Desat Protection With Ultrafast Response for High-Voltage SiC MOSFETs With High <italic>dv&#x002F;dt</italic>

Abstract

This article presents a desat protection scheme with the ultrafast response for high-voltage (>3.3 kV) SiC MOSFETs. Its working principle is the same as the conventional desat protection designed for high-voltage SiC MOSFETs, yet its blanking time is implemented by fully considering the influence of high negative dvds/dt during the fast turn-on transient. With the same circuitry as the conventional desat protection, the proposed protection scheme can significantly shorten the response time of the desat protection when it is used to protect high-voltage SiC MOSFETs. In addition, the proposed protection scheme with ultrafast response features strong noise immunity, low-cost, and simple implementation. By taking advantage of the high dv/dt during the normal turn-on transients, the proposed protection scheme can be even faster when the MOSFET has a faster switching speed. Design details and the response speed analysis under various short circuit faults are presented in detail. A half bridge phase leg based on discrete 10 kV/20 A SiC MOSFETs is built to demonstrate the proposed protection scheme. Experimental results at 6.5 kV validate the ultrafast response (115 ns response time under a hard switching fault, 155 ns response time under a fault under load), and strong noise immunity of the proposed desat protection scheme.

Keywords

• High-voltage SiC MOSFETs
• desat protection
• ultrafast response
• $dv/dt$ %22%2C%22default_operator%22%3A%22AND%22%7D%7D%7D"> high <named-content xmlns:xlink="http://www.w3.org/1999/xlink" xmlns:ali="http://www.niso.org/schemas/ali/1.0/" xmlns:mml="http://www.w3.org/1998/Math/MathML" xmlns:xsi="http://www.w3.org/2001/XMLSchema-instance" content-type="math" xlink:type="simple"> <inline-formula> <tex-math notation="LaTeX">$dv/dt$</tex-math> </inline-formula> </named-content>
• noise immunity