Oversampling ADC: A Review of Recent Design Trends

Abstract

Oversampling analog-to-digital converters (ADC) serve as the backbone of high-performance, high-precision data interfaces, owing to their remarkable ability to filter out quantization noise. This attribute makes them the preferred choice for applications requiring high signal-to-noise ratio (SNR) and moderate bandwidth, with great design flexibility. This paper provides an extensive survey of the latest advancements in oversampling ADC tailored for such applications as documented in recent literature. Specifically focusing on design techniques employed within the last five years, the survey encompasses various oversampling ADC architectures, including discrete-time and continuous-time $\Delta \Sigma $ , noise-shaping SAR, zoom, incremental, and time-domain modulators. A thorough performance comparison between these different topologies is presented, highlighting designs that achieve the best figures-of-merit. Furthermore, the paper explores circuit-level design trends commonly shared among these architectures, with particular attention given to amplifier designs for loop filters. Conclusions drawn highlight the limitations of much of the research works in the context of implementing ADC within complete systems, while also providing insight into the expected future trends that will shape the field moving forward.

Keywords

• Analog-to-digital converter (ADC)
• data converter
• delta-sigma modulator
• incremental ADC
• noise-shaping
• oversampling