Double‐sided transistor device processability of carrierless ultrathin silicon wafers

Abstract

Abstract Double‐sided metal‐oxide‐semiconductor field‐effect‐transistor processing is demonstrated for the first time on an ultrathin crystalline silicon substrate of 6‐20 μm in a 100 mm diameter wafer format without a carrier wafer, the thinnest free‐standing silicon wafers ever fabricated. The compatibility of the flexible material with conventional semiconductor processing tools is enabled by supporting an interior ultrathin silicon with a surrounding thicker ring of silicon. Current‐voltage characteristics of transistors on ultrathin silicon show performance as expected from bulk silicon, with electron mobility ~1500 cm2 V−1 second−1. Mechanical measurements quantify the handleability.

Keywords

• carrierless wafers
• flexible electronics
• integrated circuits
• ultrathin silicon