Hardware modeling of GPU geometric pipeline rasterization based on UML and SystemC

Chen Jia; Tian Ze; Wu Xiaocheng; Lou Xiaoqiang

doi:10.16157/j.issn.0258-7998.181691

Dianzi Jishu Yingyong (Jan 2019)

Hardware modeling of GPU geometric pipeline rasterization based on UML and SystemC

Chen Jia,
Tian Ze,
Wu Xiaocheng,
Lou Xiaoqiang

Affiliations

Chen Jia: AVIC Computing Technique Research Institute，Xi′an 710068，China
Tian Ze: AVIC Computing Technique Research Institute，Xi′an 710068，China
Wu Xiaocheng: AVIC Computing Technique Research Institute，Xi′an 710068，China
Lou Xiaoqiang: AVIC Computing Technique Research Institute，Xi′an 710068，China

DOI: https://doi.org/10.16157/j.issn.0258-7998.181691
Journal volume & issue: Vol. 45, no. 1
pp. 23 – 26

Abstract

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Architecture and algorithm determine the performance of GPU, and they need be verified as soon as possible. The paper brings forward a method of modeling based on UML(Unified Modeling Language), and describes the process of modeling GPU geometry engine unit architecture and line primitive rasterization algorithm in detail. Model and simulation are implemented in SystemC language. The model verifies the correctness of architecture and algorithm, and its own effectiveness and feasibility, provides reference to RTL design.

Published in Dianzi Jishu Yingyong

ISSN: 0258-7998 (Print)
Publisher: National Computer System Engineering Research Institute of China
Country of publisher: China
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering: Electronics
Website: http://journal.chinaaet.com/en

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