IEEE Access (Jan 2021)
Suppressing Harmonics in Resolver Signals via FLL-Based Complementary Filters
Abstract
In order to obtain accurate angular position and velocity from resolver signals, Resolver-to-Digital Conversion (RDC) is necessary. However, there are inevitable harmonics in resolver signals, which will deteriorate RDC accuracy seriously. Although the harmonics of resolver signals can be suppressed by using low-pass filters (LPFs), the phase lag of LPFs will result in additional errors in RDC, especially for the suppression of lower-order harmonics. In this paper, a novel filtering strategy is proposed for resolver signals by combining two complementary filters (CFs) with a frequency locked loop (FLL). Firstly, CFs are designed for the sinusoidal and cosinusoidal channels by using the natural orthogonality in the resolver signals. Each CF consists of two LPFs assisted by the estimated frequency from FLL with a frequency discriminator and a second-order observer. Secondly, a frequency discriminator is designed to detect the frequency error between the resolver signals before and after CFs. Thirdly, a second-order observer is designed to estimate the signal frequency by regulating the frequency error. Compared with conventional LPFs, FLL based CFs can suppress the low-frequency harmonics without phase lags and can improve RDC accuracy. Simulation and experimental results demonstrate the effectiveness of the proposed strategy.
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