A Low Noise Power Amplifier MMIC to Mitigate Co-Site Interference in 5G Front End Modules

Abstract

This paper presents a comparative performance analysis of a single-stage GaAs Low-Noise Power Amplifier (LNPA) fabricated in a $0.25~\mu $ m pHEMT process to mitigate co-site interference across multiple frequencies in the L- and S-bands. We compare five different designs from 1.2 to 3.8 GHz, each offering a minimum bandwidth of 300 MHz. Designed bandwidth is sufficient to cover several popular 5G NR FR1 channels as well as suitable for carrier aggregation in the LTE bands. An Output 1-dB compression point (OP1dB) of 27.5 dBm, noise figure (NF) below 1 dB and an Output 3rd-order Intercept Point (OIP3) up to 40 dBm is achieved. Adjacent Channel Leakage Ratio (ACLR) measurements are performed at 2.5 GHz with a Peak to Average Power Ratio (PAPR) of 11.8 dB. We achieve an ACLR of −25 dBc at 25 dBm of output power for a 20 MHz, 16-QAM modulation signal, while the corresponding power added efficiency & Drain-efficiency (DE) are, on average, more than 47% & 50% respectively. An integrated Electro-Static-Discharge (ESD) limiter is also incorporated, which can tolerate up to 350 V Human Body Model (HBM) and 125 V Charged Device Model (CDM) without failure. The design occupies a footprint of only 0.325 mm2.

Keywords

• Electrostatic discharge
• Gallium Arsenide
• low noise amplifier
• monolithic microwave integrated circuit (MMIC)
• noise figure
• power amplifier