Subthreshold Modeling of a Tunable CMOS Schmitt Trigger

Abstract

In this article, the subthreshold characteristics of a tunable single input CMOS Schmitt trigger (ST) are modeled for the first time. The high-to-low and low-to-high hysteresis transition points are analytically determined as a function of the tuning voltages and the transistors’ geometrical parameters. The derived expressions allow to design the ST with desired hysteresis width in subthreshold region. Furthermore, the proposed model allows to estimate the minimum supply voltage for which hysteresis occurs. The derived expressions also provide physical insight into the circuit behavior, by predicting the effect of supply voltage and temperature variations on the hysteresis width. The model is validated through simulations, and the maximum error between the analytical and simulated transition points is less than 5%. The model is also experimentally validated with an ASIC fabricated in AMS $0.35~\mu \text{m}$ CMOS process. The maximum error between the analytical and measured transition points is below 6%. The analytical model allows performance optimization in subthreshold region for low power applications.

Keywords

• CMOS
• hysteresis
• low voltage
• Schmitt trigger
• subthreshold