A Low-Phase-Noise and Area-Efficient Quad-Core VCO Based on Stacked Two-Port Inductors

Abstract

In this paper, a quad-core oscillator is presented, which exploits a novel stacked two-port inductor topology to couple four oscillator cores. The topology guarantees excellent low-phase-noise performance, while overcoming the drawbacks of multi-core oscillators in terms of power consumption and silicon area occupation. Three different 19.125-GHz quad-core VCOs were designed in a fully depleted silicon on insulator CMOS technology to demonstrate the high design flexibility of the proposed solution that allows power consumption and area occupation to be traded off according to the specific requirements. Although the quad-core VCO design was aimed at 77-GHz automotive radar, the proposed topology can be profitably exploited in RF/mm-wave wireless communication systems.

Keywords

• CMOS integrated circuits
• fully depleted silicon on insulator
• stacked inductors
• FD-SOI
• phase noise
• quad-core oscillator