Guangtongxin yanjiu (Apr 2022)
Design and Implementation of LEO-5G Downlink Synchronization Algorithm based on FPGA
Abstract
In response to the urgent need for the development of low-orbit 5th Generation Mobile Networks (5G) protocol standards, R16 protocol standards and terminal baseband chips based on 5G low-orbit broadband satellite communication systems, a Primary Synchronization Signal (PSS) detection algorithm of " two blocks combined and divided into two cross-correlation" is proposed for coarse frequency offset estimation based on the analysis of the Low Earth Orbit (LEO)-5G system's PBCH link structure and downlink time-frequency synchronization overall architecture. The frequency offset is further estimated through Secondary Synchronization Signal (SSS) correlation, and combined with Cell-Specific Reference Signal (CRS) pilot signal to determine the precise synchronization LEO-5G downlink synchronization algorithm with Field Programmable Gate Array (FPGA). The feasibility and effectiveness of the algorithm were verified by simulation using Vivado and Matlab. The results show that the synchronization algorithm has good real-time performance and high stability. The accuracy rate of the downstream time-frequency synchronization FPGA module with Management Information Base (MIB) parsing is about 83.07%. The chip storage resource consumption for the evaluation of timing and resource consumption is only 11.7%. All indicators meet the indicator requirements.
