Reducing the DC-Link Voltage Ripple by Optimized Pulse Patterns to Increase the Power Density of Traction Inverters in Electric Vehicles

Abstract

The DC-link capacitor represents a critical component in electric vehicle traction inverters, given that it constitutes the largest single volume within a traction inverter. The DC-link capacitance must be selected carefully, to ensure that the voltage ripple remains within defined limits, as this has a direct impact on the design of other components connected to the high voltage bus. Typical approaches attempt to reduce the required DC-link capacitance by increasing the pulse width modulation (PWM) switching frequency. However, this leads to a compromise as higher switching frequencies can cause additional losses, potentially necessitating a larger area for costly silicon carbide (SiC) semiconductors. In this contribution, optimized pulse patterns (OPPs) are proposed as a solution to improve the DC-link voltage ripple, allowing a reduction in capacitor size and a significant decrease in switching frequency compared to the standard Space-Vector PWM. The paper outlines the mathematical methods for simulating and designing the DC-link regarding voltage ripple and current stress. It compares the simulations for Space-Vector PWM and OPPs, leading to the development of two distinct capacitor designs. The theoretical 20% reduction in the volume of the DC-link capacitor is confirmed through experimental validation on a 250 kW machine test bench setup.

Keywords

• Capacitor
• optimized pulse pattern
• pulse width modulation
• synchronous modulation
• variable speed drives