IEEE Access (Jan 2024)
FPGA-Based Bee Counter System
Abstract
The bee counter described in this paper is a device that is installed at the entrance of the hive and forces the bees to pass through one of its twenty passageways. Each passageway has an LED at the top, which emits infrared light, and at the bottom a double photodiode integrated in the same package, which generates electrical pulses when the bee passes through the passageway and cuts the light beam. The pulses are monitored by an FPGA that counts the number of bees entering and leaving the passageway, each of which has its own control unit, implemented in the FPGA, achieving a correct and independent interpretation of the temporal relationship between the two pulses. Furthermore, the sampling frequency of the pulses and the small distance between the photodiodes, because they are in the same encapsulation, make it possible to detect the input or output of bees moving very close to each other, with a minimum distance of approximately 1 mm. In addition, the fact that each passageway has its own control unit makes it possible to detect anomalous conditions due to a failure in the LED or photodiodes, or anomalies caused even by the bees as the propolis. For these cases, a timer associated to each passageway in the FPGA has been included, which starts a timer when one of the two photodiodes does not detect a light beam. The counter has two working modes: connected to a host or in stand-alone mode, in which it periodically sends the bee count. The counter has an UART of ABR (Automatic Baud Rate) type where it receives the AT commands sent by the host to request the input and output counts and the status of the passageways. The answer data corresponding to the command are also sent to the host through the UART. The FPGA description has been performed in VHDL and customizable so that it can be implemented for any number of passageways on any FPGA. The system was evaluated in three hives from August 2nd to September 23rd, 2020, during the end of the summer season and the previous results are also shown in this work.
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