Journal of Low Power Electronics and Applications (Aug 2022)

Computer Engineering Education Experiences with RISC-V Architectures—From Computer Architecture to Microcontrollers

  • Peter Jamieson,
  • Huan Le,
  • Nathan Martin,
  • Tyler McGrew,
  • Yicheng Qian,
  • Eric Schonauer,
  • Alan Ehret,
  • Michel A. Kinsy

DOI
https://doi.org/10.3390/jlpea12030045
Journal volume & issue
Vol. 12, no. 3
p. 45

Abstract

Read online

With the growing popularity of RISC-V and various open-source released RISC-V processors, it is now possible for computer engineers students to explore this simple and relevant architecture, and also, these students can explore and design a microcontroller at a low-level using real tool-flows and implement and test their hardware. In this work, we describe our experiences with undergraduate engineers building RISC-V architectures on an FPGA and then extending their experiences to implement an Arduino-like RISC-V tool-flow and the respective hardware and software to handle input-output ports, interrupts, hardware timers, and communication protocols. The microcontroller is implemented on an FPGA as a Senior Design project to test the viability of such efforts. In this work, we will explain how undergraduates can achieve these experiences including preparation for these projects, the tool-flows they use, the challenges in understanding and extending a RISC-V processor with microcontroller functionality, and a suggestion of how to integrate this learning into an existing curriculum, including a discussion on if we should include these deeper experiences in the Computer Engineering undergraduate curriculum.

Keywords