Ultralow‐Power Compact Artificial Synapse Based on a Ferroelectric Fin Field‐Effect Transistor for Spatiotemporal Information Processing

Abstract

Artificial synapses are key elements in building bioinspired, neuromorphic computing systems. Ferroelectric field‐effect transistors (FeFETs) with excellent controllability and complementary metal oxide semiconductor (CMOS) compatibility are favorable to achieving synaptic functions with low power consumption and high scalability. However, because of the only nonvolatile ferroelectric (Fe) characteristics in the FeFET, it is difficult to develop bioplausible short‐term synaptic elements for spatiotemporal information processing. By judiciously combining defects (DE) and Fe domains in gate stacks, a compact artificial synapse featuring spatiotemporal information processing on a single Fe–DE fin FET (FinFET) is proposed. The devices are designed to work in a separate DE mode to induce short‐term plasticity by spontaneous charge detrapping, and a hybrid Fe–DE mode to trigger long‐term plasticity through the coupling of defects and Fe domains. The capability of the compact synapse is demonstrated by differentiating 16 temporal inputs. Moreover, the highly controllable static electricity of advanced FinFETs leads to an ultralow power of 2 fJ spike−1. An all Fe–DE FinFET reservoir computing (RC) system is then constructed that achieves a recognition accuracy of 97.53% in digit classification. This work enables constructing RC systems with fully advanced CMOS‐compatible devices featuring highly energy‐efficient and low‐hardware systems.

Keywords

• charge trapping
• compact artificial synapse
• ferroelectric fin field-effect transistor (FinFET)
• long-term plasticity
• polarization switching
• reservoir computing