High-fidelity mode scaling via topological-optimized on-chip metalens for compact photonic interconnection

Abstract

Photonic integrated circuits (PICs) have attracted significant interest in communication, computation, and biomedical applications. However, most rely on highly integrated PICs devices, which require a low-loss and high-integration guided wave path. Owing to the various dimensions of different integrated photonic devices, their interconnections typically require waveguide tapers. Although a waveguide taper can overcome the width mismatch of different devices, its inherent tapering width typically results in a long length, which fundamentally limits the efficient interconnection between devices with a high scaling ratio over a short distance. Herein, we proposed a highly integrated on-chip metalens that enables optical interconnections between devices with high width-scaling ratios by embedding a free-form metasurface in a silicon-on-insulator film. The special geometric features endow the designed metalens with high coupling efficiency and high integration. The device has a footprint of only 2.35 μm in the longitudinal direction and numerical aperture of 2.03, enabling beam focusing and collimation of less than 10 μm between devices with width-scaling ratio of 11. For the fundamental transverse electric field (TE0) mode, the relative transmittance is as high as 96% for forward incidence (from wide to narrow waveguides), whereas the metalens can realize wavefront shaping for backward incidence, which can be used in optical phase arrays. This study provides new ideas for optical interconnect design and wavefront shaping in high-integration PICs. Our design approach has potential applications in directional radiators, LiDAR, on-chip optical information processing, analogue computing, and imaging.

Keywords

• on-chip metalens
• inverse design
• phase collimate
• photonic integrated circuits