Area and Device Count Efficient Binary Logic Circuits using Anti‐Ambipolar Switch Devices

Abstract

Abstract The unique characteristics of an anti‐ambipolar switch (AAS) device exhibit Λ‐shaped transfer responses (namely delta conductance) and present unique opportunities to overcome the limit of silicon‐based, complementary metal‐oxide‐semiconductor (CMOS) logic circuits. It is crucial because a device that only turns on under a certain bias range can be utilized to simplify the logic circuit and reduce the device count and circuit area required to perform logic functions. In this study, a physically scalable AAS device is investigated using ZnO and dinaphtho[2,3‐b:2′,3′‐f]thieno[3,2‐b]thiophene as heterojunction structures to reduce the operating voltage and enhance the peak current and peak‐to‐valley ratio of the AAS device. Moreover, novel logic circuits for AND, OR, XOR, DEMUX, and half‐adder functions are demonstrated using AAS devices. AAS device‐based logic circuits exhibit power‐efficiency characteristics (≈49 times lower than that of the 90‐nm silicon‐based CMOS inverter) and reduce the transistor count and the circuit area by ≈67% and ≈70%, respectively. These results indicate that the use of AAS device‐based logic circuits can be a promising approach to overcome the physical scaling limit of current CMOS technology.

Keywords

• anti‐ambipolar
• delta conductance
• heterojunction
• logic circuit
• negative differential transconductance