IEEE Open Journal of the Solid-State Circuits Society (Jan 2023)

A Digital Power Amplifier With Built-In AM–PM Compensation and a Single-Transformer Output Network

  • Jeongseok Lee,
  • Doohwan Jung,
  • David Munzer,
  • Hua Wang

DOI
https://doi.org/10.1109/OJSSCS.2023.3304599
Journal volume & issue
Vol. 3
pp. 134 – 144

Abstract

Read online

This article presents a digital power amplifier (DPA) with a built-in AM–PM compensation technique and a compact single-transformer footprint. The AM–PM distortion behavior of the current-mode/voltage-mode power amplifiers (PAs) is detailed and an AM–PM compensation technique for both modes is introduced. The proposed design utilizes one current-mode DPA as the main path PA and a class-G PA voltage-mode digital PA as the auxiliary path PA, combined through a single-transformer footprint. It provides enhanced linearity through built-in adaptive biasing and hybrid current-/voltage-mode Doherty-based power combining. As a proof of concept, a 1.2–2.4-GHz wideband DPA is implemented in the Globalfoundries 45-nm CMOS SOI process. The measurements show a 37.6% peak drain efficiency (DE) at 1.4 GHz, and 21.8-dBm saturated output power (Psat) and $1.2\times /1.4\times $ power back-off (PBO) efficiency enhancement, compared to the ideal class-B at 3 dB/6 dB PBO at 1.2 GHz. This proposed digital PA supports 20-MSym/s 64-QAM modulation at 14.8-dBm average output power and 22.8% average PA DE while maintaining error vector magnitude (EVM) lower than −23 dB without any phase predistortion. To the best of our knowledge, this is the first demonstration of hybrid current–voltage-mode Doherty power combining on a single-footprint transformer over a broad bandwidth (BW).

Keywords