IEEE Journal on Exploratory Solid-State Computational Devices and Circuits (Jan 2020)

Hybrid-Phase-Transition FET Devices for Logic Computation

  • Manuel Jimenez,
  • Juan Nunez,
  • Maria Jose Avedillo

DOI
https://doi.org/10.1109/JXCDC.2020.2993313
Journal volume & issue
Vol. 6, no. 1
pp. 1 – 8

Abstract

Read online

Hybrid-phase-transition FETs (HyperFETs), built by connecting a phase transition material (PTM) to the source terminal of a FET, are able to increase the ON-to- OFF current ratio. In this article, we describe a comprehensive study carried out to explore the potential of these devices for low-power and energy-limited logic applications. HyperFETs with different ON-OFF current tradeoffs are evaluated at the circuit level. The results show limited improvement over conventional transistors in terms of power and energy. However, based on this analysis, this article proposes different design techniques to overcome the drawbacks identified in the study and thereby make better use of HyperFETs. Hybrid circuits, using both FinFETs and HyperFETs, and circuits combining different HyperFET devices are introduced and evaluated. At some frequencies, reductions of over 40% were obtained with respect to FinFET-only implementations, while minimum energy per operation values were obtained, which were lower than those achieved with low standby power (LSTP) FinFETs and high-performance (HP) FinFETs. This article also evaluates the impact of PTM transition time on the power performance of HyperFET circuits.

Keywords