A novel dual-port three-level converter

Abstract

Aiming to address the problems of high cost, large size and complex structure of the traditional back-to-back three-level converter, this paper proposes a new dual-port three-level converter topology. This new topology reduces the number of switching devices and optimizes the system size through device multiplexing. Firstly, the operating principle of the proposed converter topology is analyzed in detail, outlining the six effective switching states, current flow paths, and corresponding dual-port output levels of the single leg, while also discussing and the voltage stresses of each switching device. Secondly, a level-shifting pulse width modulation for the proposed converter topology is investigated and designed, and the effect of modulating wave overlap is avoided by adding DC offsets. Thirdly, the key problems of the modulation scheme under both the common frequency and different frequency operation modes, such as the modulation regime range and phase angle difference constraints are analyzed. The principles for selecting DC offsets and constraint range of two-port modulation system in each operating mode are introduced. Finally, the different operating modes are verified using the DSP-FPGA-Typhoon HIL 402 experimental platform. The experimental results show that level-shifting pulse width modulation with DC offsets makes the output power quality of the converter better and the harmonic content lower on the premise of achieving stable output of voltage and current for the proposed converter topology.

Keywords

• converter
• dual-port
• level-shifting pulse width modulation
• dc offsets
• modulation regime
• power quality