Modelling and analysis on short-circuit failure for press-pack IGBT devices used in VSC-HVDC converter

Abstract

Press-pack insulated gate bipolar transistor (IGBT) device is the key component in the voltage source converter high voltage direct current (VSC-HVDC) due the advantage of the short-circuit failure. However, it is difficult to analyse the IGBT short-circuit failure mode due to the complex packaging and the short failure time. This study presents a method on simulation for the short-circuit failure mode of the press-pack IGBT device. First, based on the structure of a single-chip 3.3 kV/50 A press-pack IGBT, a multi-physical field model was presented by considering the electro–mechanical–thermal coupling effects, so that the internal weak layer was found by comparing with the different sustained pressures. Then, an equivalent method is proposed by using the different aluminium–silicon reaction osmotic hole in the chip, and the models were presented to simulate the short-circuit failure. Furthermore, after short-circuit failure of the device, the thermal resistance variation of each later in press-pack IGBT device was obtained. Finally, the experiment on the steady state and the short-circuit tests were performed, by analysing the weak layer and the short-circuit failure position of the IGBT device, the proposed models and analysis were testified. The achievement is helpful to optimal design of the press-pack IGBT device to improve the VSC-HVDC converter reliability.

Keywords

• HVDC power transmission
• HVDC power convertors
• failure analysis
• bipolar transistor circuits
• power transmission reliability
• voltage-source convertors
• press-pack IGBT device
• IGBT short-circuit failure mode
• short failure time
• short-circuit tests
• short-circuit failure position
• failure stage
• VSC-HVDC converter reliability
• voltage 3.3 kV
• current 50.0 A