Doklady Belorusskogo gosudarstvennogo universiteta informatiki i radioèlektroniki (May 2020)

Influence of the rapid thermal treatment of the gate dielectric on the parameters of integrated circuits of time devices

  • V. A. Saladukha,
  • V. A. Pilipenko,
  • V. A. Gorushko

DOI
https://doi.org/10.35596/1729-7648-2020-18-3-20-27
Journal volume & issue
Vol. 18, no. 3
pp. 20 – 27

Abstract

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The paper is dedicated to influence of the rapid thermal treatment of the gate dielectric at a temperature of ~1100 °С on the electrical parameters of the programmable time device with a correction of 512PS8. As the analyzed parameters of the given integrated circuit, the authors have selected breakdown voltage, gate leakage current, charge value of the gate dielectric breakdown with its thermal field tests performed. The breakdown voltage of the p-channel of the test transistor was measured by applying the linear voltage sweep from 0 to -100 V with the step of -0,5 V with the grounded drain and source. The leakage current of the gate Ig leak was determined at the gate voltage of -20 V. For evaluation of the charge properties of the gate dielectric of devices the, the thermal field tests were performed. The quality and reliability of the gate dielectric the authors the breakdown charge control was carried out (Qbd). It is shown that the rapid thermal treatment of the gate dielectric at a temperature of ~1100 °С during 7 s with its presence on the non-working side ensures the breakdown charge value of 2,040 C/cm2, and with its absence - 2,230 C/cm2, while during the standard process of creating the given integrated circuit this value constitutes 1,230 C/cm2. This means that the most efficient influence on the improvement of quality and reliability of the gate dielectric is ensured by its rapid thermal treatment when missing the silicon dioxide on the non-working side of the wafer. As compared with the standard process of their fabrication, carrying out such treatment allows 5,29 times reduction of the gate leakage current, 3,50 times reduction of the charge states and 1,07 times enhancement of the reliability of the p-channel transistor, and for the n-channel transistor the given values constitute 10,67, 3,50 and 1,81 times, respectively. It is established that the reliability improvement for the CMOS integrated circuits of time devices during the rapid thermal treatment of the gate dielectric is determined by a step-up of its breakdown charge owing to the more perfect microstructure of dielectric, resulting in the rebuild of the charge states both in the bulk and on the boundary with silicon.

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