Advanced Electronic Materials (May 2024)

Optimization Method for Conductance Modulation in Ferroelectric Transistor for Neuromorphic Computing

  • Cheol Jun Kim,
  • Jae Yeob Lee,
  • Minkyung Ku,
  • Tae Hoon Kim,
  • Taehee Noh,
  • Seung Won Lee,
  • Ji‐Hoon Ahn,
  • Bo Soo Kang

DOI
https://doi.org/10.1002/aelm.202300698
Journal volume & issue
Vol. 10, no. 5
pp. n/a – n/a

Abstract

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Abstract The learning accuracy of neuromorphic computing that mimics the biological brain, is affected by the conductance‐modulation characteristics of an artificial synapse. In ferroelectric‐based devices, these characteristics are implemented using a distribution of polarization values. Therefore, the distribution in a ferroelectric thin film with various external voltage signals is investigate. As polarization switching proceeds with voltage pulse, the domains of the switched polarization become larger. In ferroelectric‐gate field effect transistors, the channel layer assumed to lie beneath the ferroelectrics experiences a local conductance change, according to the polarization distribution of the ferroelectric layer. It is found that small clusters with high conductivity become large clusters in the channel layer as the polarization switching proceeds. When the additional pulses are applied, the high conductive regions eventually connect (i.e., percolate) in the channel layer and the conductance of the layer is greatly increased. Adjusting the height of the applied voltage can slow down or speed up this phenomenon. Also, the nanosecond voltage pulses are employed and the width of the conductive pathway is adjusted. It enables to fine‐tune the conductance of the channel layer. It demonstrates that conductance modulation is optimized with an appropriate voltage pulse train pattern.

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