A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

Chih-Yuan Lien; Chi-Huan Tang; Pei-Yin Chen; Yao-Tsung Kuo; Yue-Ling Deng

doi:10.1109/ACCESS.2020.2984688

IEEE Access (Jan 2020)

A Low-Cost VLSI Architecture of the Bilateral Filter for Real-Time Image Denoising

Chih-Yuan Lien,
Chi-Huan Tang,
Pei-Yin Chen,
Yao-Tsung Kuo,
Yue-Ling Deng

Affiliations

Chih-Yuan Lien: Department of Electronic Engineering, National Kaohsiung University of Sciences and Technology, Kaohsiung, Taiwan
Chi-Huan Tang: Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan
Pei-Yin Chen: ORCiD; Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan
Yao-Tsung Kuo: ORCiD; Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan
Yue-Ling Deng: Department of Computer Science and Information Engineering, National Cheng Kung University, Tainan, Taiwan

DOI: https://doi.org/10.1109/ACCESS.2020.2984688
Journal volume & issue: Vol. 8
pp. 64278 – 64283

Abstract

Read online

In this paper, a low-cost hardware architecture of the bilateral filter for real-time image processing is proposed. Based on the techniques of distance-oriented grouping and hardware resource sharing, the usage of multipliers can decrease 48% as compared to the previous approach. Besides, an efficient quantization method is applied to reduce the size of required look up tables. The experimental results show that the proposed architecture is cost efficient while maintaining the same image quality, frame rate and working clock frequency.

Published in IEEE Access

ISSN: 2169-3536 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639

About the journal

Abstract

Keywords