Energies (May 2023)

Three-Leg Quasi-Z-Source Inverter with Input Ripple Suppression for Renewable Energy Application

  • Chuanyu Zhang,
  • Chuanxu Cao,
  • Ruiqi Chen,
  • Jiahui Jiang

DOI
https://doi.org/10.3390/en16114393
Journal volume & issue
Vol. 16, no. 11
p. 4393

Abstract

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Single-phase inverters are widely employed in renewable energy applications. However, their inherent 2ω-ripple power can substantially affect system performance, leading to fluctuations in the maximum power points (MPP) of photovoltaic (PV) systems and shortening the lifespans of fuel cell (FC) systems. To alleviate input ripple, a three-leg quasi-Z-source inverter (QZSI) and its associated control strategy are proposed. The QZSI consists of a quasi-Z-source network, an H-Bridge inverter, and an active power filter (APF). The active filtering structure comprises filtering capacitors and the third bridge leg. The proposed control strategy consists of three loops: open-loop simple boost control, output voltage control, and 2ω-ripple suppression control. Open-loop simple boost control is utilized for shoot-through state modulation, output voltage control is applied to the two bridge-legs of the H-Bridge, and the additional third bridge-leg adopts a quasi-PR control (QPR) method that injects specific frequency harmonic voltage and suppresses newly generated low-frequency components of the input current. This method effectively avoids the drawbacks of utilizing passive filtering strategies, such as high-value impedance networks, low power density, and weak system stability. A simulation platform of 300W 144VDC/110VAC50Hz is constructed. The simulation results indicate that the addition of the third bridge leg under full load conditions reduces the input-side inductor current ripple ΔI from 1.89 A with passive filtering to 0.513 A, representing a reduction of 72.86%. The second harmonic ripple of the input current is reduced from 18.2% to 4.5%, and the fourth harmonic ripple is reduced from 16.5% to 2.1%. The DC bus voltage ripple ΔVPN falls from 70.75 V to 6.54 V, representing a reduction of 90.76%. The Total Harmonic Distortion (THD) of the output voltage and current are both less than 1%. The simulation results validated the feasibility of the proposed approach.

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