A Fully Integrated System‐on‐Chip Design with Scalable Resistive Random‐Access Memory Tile Design for Analog in‐Memory Computing

Abstract

As the demands of big data applications and deep learning continue to rise, the industry is increasingly looking to artificial intelligence (AI) accelerators. Analog in‐memory computing (AiMC) with emerging nonvolatile devices enable good hardware solutions, due to its high energy efficiency in accelerating the multiply‐and‐accumulation (MAC) operation. Herein, an Applied Materials custom‐designed system‐on‐chip (SoC) targeting AI applications with analog in‐memory computing using resistive random‐access memory (ReRAM) as the compute element is demonstrated. The first silicon achieves high energy efficiency in MAC operations. This chip is implemented with LeNet‐1 neural network on ReRAM tiles and demonstrated by Modified National Institute of Standards and Technology (MNIST) classification with accuracy matching that predicted in the simulations. A simulation framework, AI Sim, is also developed to evaluate the system performance for large‐scale application and guide the bitcell development and design choices.

Keywords

• analog in-memory computing
• one-transistor-one-resistor
• resistive random-access memory