Electrically Tuning Interfacial Ion Redistribution for mica/WSe2 Memory Transistor

Abstract

Abstract Memory device is an important part of electronic equipment. 2D transition metal dichalcogenides that exhibit novel electrical characteristics hold promise in developing new types of memory device. Here, the memory effect in 2D mica/WSe2 heterostructure is investigated. Under applying constant bias voltage and gate voltage, the K+ ions in mica will migrate in the direction of the electric field and be trapped to enable the memory function. The gradient K+ ions work as long‐range scatters to electrostatically dope the WSe2 channel. The shift of the threshold voltage indicates an electrostatic doping concentration up to 2.11 × 1012 cm−2. The operating voltage is as low as 10 V and the on/off ratio is estimated to be 104. To determine the mechanism, the dynamic behavior of the device is discussed and a model is proposed which reveals the correlation between the programming/erasing process and the device performance. Moreover, through defining and studying the effective charge trapping rate, θ, it is found that the trapped charge is proportional to the charge flowing through the channel which means that the device performance can be finely tuned by the programming process.

Keywords

• ion redistribution
• memory transistors
• Mica/WSe 2 heterostructures