ITM Web of Conferences (Jan 2023)

Design and Programming for Multicore machines: An Empirical study on time and effort required by programmer

  • Vinay T.R.,
  • Satish E.G.,
  • Megha J.

DOI
https://doi.org/10.1051/itmconf/20235701016
Journal volume & issue
Vol. 57
p. 01016

Abstract

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As the demand for high-performance computing continues to surge, harnessing the full potential of multicore architectures has become paramount. This paper explores a pragmatic approach to transition from sequential to parallel programming, capitalizing on the computational prowess of modern hardware systems. Recognizing the challenges of enforcing parallelism in early software development phases, we advocate for a focus on the implementation stage, where architects, designers, and developers can seamlessly introduce parallel constructs while preserving software integrity. To facilitate this paradigm shift, we introduce the “SDLC model with Parallel Constructs,” a modified Software Development Life Cycle (SDLC) framework comprising additional phases: “Parallel Constructs” and “Test Parallel Constructs.” This model empowers development teams to integrate parallel computing efficiently, enhancing performance and maintaining a structured development process. Our observations reveal intriguing dynamics. Initially, the single-threaded program outperforms its parallel counterpart for smaller datasets, but as data sizes grow, the parallel version demonstrates superior performance. We underscore the pivotal role of available CPU cores and task partitioning in determining efficiency. Our analysis also evaluates the programmer’s effort, measured by lines of code, needed for the transition. Leveraging OpenMP constructs streamlines this transition, reducing programming complexity.

Keywords