Compact grounded memristor model with resistorless and tunability features

Abstract

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This research article provides a circuit illustration of a grounded memristor emulator. An operational transconductance amplifier (OTA) is one of its active components, along with two transistors and one capacitor. With a simple flip of the input ports, the incremental and decremental settings for the proposed memristor may be preserved. With the capacity to function in the megahertz band, the circuit offers a resistorless and controllable feature. Using the Cadence Virtuoso EDA tool in an analog design environment (ADE), PSPICE simulation with 0.18 µm TSMC technology parameter has been used to illustrate the viability of the suggested memristor. It has been confirmed in the simulation section that the operating frequency and tunability responses in the current-voltage (I-V) plane are in reasonable agreement with the theory. The suggested memristor model’s resilience has also been tested using process corner, Monte Carlo analysis, and temperature analyses, as well as single and parallel connected structures. The suggested memristor model is simple and does not need additional sub-circuit components, making it appropriate for implementation in integrated circuits. The experimental demonstration has been carried out by making a prototype on a breadboard using ICs, which exhibits good agreement with theoretical and simulation results. Single/parallel combinations of memristor, chaotic oscillator, and high pass filter have been presented to demonstrate its application.

Keywords

• current mode circuit
• memristor
• pinched hysteresis loop (PHL)
• chaotic oscillator
• CMOS technology