Dianzi Jishu Yingyong (Jul 2018)

Design of integrated multi-mode reference voltage generator for SAR ADC

  • Hou Jiali,
  • Hu Yi,
  • He Yang,
  • Wang Xiaoman,
  • Yang Xiaokun

DOI
https://doi.org/10.16157/j.issn.0258-7998.174395
Journal volume & issue
Vol. 44, no. 7
pp. 34 – 37

Abstract

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Aiming at the problems of complex supply voltage and high sensitivity of power in ADC for the industrial Internet of Things, this paper presents a flexible, low power and low noise reference voltage generator for the SAR ADC to obtain good PSRR and a stable supply-independent full-scale range. The 2.5 V or 1.5 V is available based on the different range of supply voltage(2.65 V~3.6 V or 2.2 V~3.6 V). This circuit support off-chip capacitor to provide transient current for the ADC to avoid the power-hungry integrated buffer in series sampling mode. An energy-efficient mode which uses integrated buffer rather than off-chip capacitor can be configured to obtain short setting time to save energy during each one-shot sample. Testing result shows the circuit can save power/energy with no loss in ADC performance.

Keywords