Application of a Simplified PLL Algorithm for Unbalanced Three Phase Systems by Using Low Cost Microcontrollers

Abstract

In literature, there are many Phased Locked Loop (PLL) methods achieving grid matching successfully under unbalanced grid conditions. However, these methods require high computational resources. In this article, a simplified PLL algorithm has been used with fixed point arithmetic for detecting phase and magnitude of an unbalanced three phase system. The simplification factor comes from the fact that an easy to implement low pass filtering algorithm has been implemented in a 16 bit microcontroller operating at 20 MHz clock speed. Sampling frequency has been selected as 20 kHz so that a low cost grid connected inverter operating up to 20 kHz switching frequency can be designed.

Keywords

• Multiple Reference Frame Phased Locked Loop
• Phase Locked Loop
• Synchronous Reference Frame Phased Locked Loop
• Unbalanced Three Phase Voltages