A chopper amplifier with a low duty‐cycle sub‐sampling in the switched‐capacitor integrator for noise reduction

Abstract

Abstract This letter presents a low‐noise implementation of the switched‐capacitor (SC) DC servo loop (DSL) in the capacitively coupled chopper instrumentation amplifier (CCIA). The noise of the SC integrator in SC DSL is first analyzed, then a low duty‐cycle subsampling and unbalanced capacitor ratio are proposed to reduce the noise. Fabricated in a 65‐nm complementary metal‐oxide semiconductor (CMOS) process, the CCIA achieves 2.5 μVrms input‐referred noise, integrated from 0.5 to 250 Hz, and 110‐mV electrode‐DC offset (EDO) cancellation range. Besides, the calculated noise of the SC integrator well matches the measured, which proves the noise analysis. Compared with prior designs adopting similar SC integrators, this work reduces the noise level by 2× and increases the cancellation range by 2×.

Keywords

• choppers (circuits)
• instrumentation amplifiers
• switched‐capacitor filters