Performance enhancement of DSOGI-PLL with a simple approach in grid-connected applications

Abstract

In the literature history, many enhanced phase locked loops (PLLs) have been presented to enhance the performance of synchronous reference frame-PLL (SRF-PLL) against the grid imbalances and disturbances. One of these methods is a dual second order generalized integrator-PLL (DSOGI-PLL), which provides a perfect imbalance rejection capability. However, the DSOGI-PLL has a large convergence time and frequency overshoot, which brings a serious problem for grid-connected equipments. The aim of this study is to improve the performance of standard DSOGI-PLL without decreasing its disturbance rejection capability. In accordance with this purpose, a simple yet effective method is proposed. The effectiveness of advanced DSOGI-PLL is verified by experimental results.

Keywords

• DSOGI-PLL
• Quasi-type-1
• Phase locked loop
• PLL