Lateral Power Fin MOSFET With a High-k Passivation for Ultra-Low On-Resistance

Junji Cheng; Jingjie Lin; Weizhen Chen; Shiying Wu; Haimeng Huang; Bo Yi

doi:10.1109/ACCESS.2020.2980042

IEEE Access (Jan 2020)

Lateral Power Fin MOSFET With a High-k Passivation for Ultra-Low On-Resistance

Junji Cheng,
Jingjie Lin,
Weizhen Chen,
Shiying Wu,
Haimeng Huang,
Bo Yi

Affiliations

Junji Cheng: ORCiD; State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China
Jingjie Lin: ORCiD; State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China
Weizhen Chen: ORCiD; State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China
Shiying Wu: ORCiD; State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China
Haimeng Huang: ORCiD; State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China
Bo Yi: ORCiD; State Key Laboratory of Electronic Thin Films and Integrated Devices, University of Electronic Science and Technology of China, Chengdu, China

DOI: https://doi.org/10.1109/ACCESS.2020.2980042
Journal volume & issue: Vol. 8
pp. 48991 – 48999

Abstract

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A novel lateral power fin metal-oxide-semiconductor field-effect transistor (MOSFET) made on a silicon-on-insulator substrate is proposed. The fin silicon drift region of the proposed device is surrounded by a high-k (HK) passivation. The HK passivation enables the proposed device to realize a three-dimensional (3D) enhanced reduced-surface-field action and a 3D accumulation layer. According to the simulation results, when compared to a lateral power planar MOSFET with an HK passivation, the proposed device offers a 78% reduction in specific on-resistance at the same 100-V breakdown voltage. More comparative studies indicate that the static characteristic of the proposed device not only overcomes the silicon limit but also presents a significant advantage when compared to the prior art.

Published in IEEE Access

ISSN: 2169-3536 (Online)
Publisher: IEEE
Country of publisher: United States
LCC subjects: Technology: Electrical engineering. Electronics. Nuclear engineering
Website: https://ieeexplore.ieee.org/xpl/RecentIssue.jsp?punumber=6287639

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