A Cascaded Multilevel Inverter Based on a New Basic Unit

Abstract

In this paper, a new basic unit is proposed for multilevel inverters. Then, a series connection of the proposed basic unit is used to recommend a new topology for multilevel inverters. To determine the magnitude of dc voltage sources, a new algorithm is presented. For the proposed algorithm, different performance parameters such as total voltage rating of switches (TVRS), number of gate drivers, and number of required sources are calculated as a function of the number of output voltage levels and are compared with other topologies. The comparison proves that the proposed cascaded topology requires fewer components and gate driver circuits than most of the other conventional topologies. Moreover, the voltage rating of switches is less than the other topologies which result lower cost and control complexity. Finally, the correctness of the theoretical analysis and the performance of the proposed inverter are verified using the laboratory and simulation results under different scenarios.

Keywords

• cascaded multilevel inverter
• symmetric cascaded multilevel inverter
• asymmetric cascaded multilevel inverter