Research of the influence of crystal oscillator on EMC in RF module

Abstract

This paper proposes a SoC chip clock scheme and designs two layout schemes. By analyzing the causes of electromagnetic interference and judging the simulation results of the isolation degree between signals, the risk of inter-signal interference in the layout scheme can be identified in advance, which will deteriorate the output analog signal quality of SoC chip. In this paper, the simulation results of the isolation degree between signals are used to guide the layout design, and the optimization layout method is given to improve the performance of the isolation degree between signals. The test results show that the simulation results of the two layout design schemes are consistent with the actual results, which verifies the accuracy and reference of the simulation results.

Keywords

• emc
• emi
• digital-analog hybrid
• isolation