An Active Track and Hold Circuit With Linearity Enhancement Technique and Its Analysis Using Volterra Series

Abstract

This paper presents a comprehensive analysis of active track and hold (T/H) circuits that utilize switched source followers and time-divided post-distortion cancellation. In the track phase, the circuit acts as an active buffer and transfers an input signal, including track-mode distortion caused by the buffer’s nonlinear transconductance. In the hold phase, the transferred signal is held but hold-mode distortion is added, including hold-mode feed-through and hold pedestal error, causing deterioration of the circuit’s linearity. The time-divided post-distortion cancellation technique improves the circuit’s linearity by cancelling the track-mode distortion with the hold-mode distortion. Volterra series analysis offers a comprehensive understanding of the operation. 17 sample chips were measured to verify stable cancellation operation. It shows a mean SFDR value of 77.1 dB and a standard deviation of 1.8 dB with 9mW power consumption.

Keywords

• CMOS
• track and hold
• RF sampling
• source follower
• Volterra analysis
• distortion cancellation