Realization of SRRC filter and multi-rate conversion based on FPGA

Abstract

In order to eliminate the inter symbol interference(ISI) in the communication system and improve the band utilization, the square root-raised cosine filter is often used to realize the base-band shaping filter of the baseband signal. In order to achieve high rate transmission of signals with different symbol rates in communication systems, multi-rate conversion techniques are used in digital signal processing to improve the sampling rate of digital signals. In this paper, SRRC filter and HB, CIC and Farrow filters are cascaded, then a multi-rate converter module based on FPGA is realized. The module can achieve arbitrary multiples of upper sampling , what’s more, by online coefficient reload capability of SRRC filter and online upper insertion ratio reload capability of CIC and Farrow filter, it saves FPGA internal resources effictively. SRRC filter and multi-rate converter module is realized through Verilog programming and the use of IP core on ISE platform. The simulation waveforms of ModelSim and the experimental results are given, raised cosine and multi-rate conversion characteristics are verified, what’s more, the multi-rate conversion module can achieve arbitrary multiples of upper sampling, eliminate the inter symbol interference and improve the band utilization. It is simple to implement effectively.

Keywords

• fpga
• base-band shaping filter
• upper sampling
• arbitrary multiples
• isi