IET Circuits, Devices and Systems (Nov 2017)

Approach for designing and modelling of nanoscale DG MOSFET devices using Kriging metamodelling technique

  • Toufik Bentrcia,
  • Fayçal Djeffal,
  • Elasaad Chebaki

DOI
https://doi.org/10.1049/iet-cds.2017.0204
Journal volume & issue
Vol. 11, no. 6
pp. 618 – 623

Abstract

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In this study, the authors focus mainly on the investigation of Kriging interpolation method to elaborate surrogate models of the nanoscale double‐gate metal oxide silicon field effect transistors (DG MOSFET) analogue/RF performance under critical operational conditions. The elaboration of such models is made possible through the generation of computer experiments using ATLAS‐2D simulator, where the numerical simulations or experimental measurements, account for the accurate behaviour of the device including the ageing phenomena, short channel and quantum confinement effects. The validity of the obtained Kriging models is tested by comparing the predicted responses of the device with their numerical counterpart in terms of some statistical criteria namely the sum of relative errors, the mean percentage of absolute errors and the correlation coefficient. It is also shown that the obtained Kriging interpolation models are precise enough to be used as objective functions in the context of a genetic algorithm optimisation with the aim of improving the device analogue/RF performance in terms of transconductance and cut‐off frequency parameters. Therefore, this study may provide more insights regarding the investigation of surrogate modelling tools in the field of deep nanoscale devices especially with the intractable mission of developing physical based models at this scale for nanoelectronic simulators.

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