Digital Background Compensation of Analog Impairments in Jointly Frequency-Time Interleaved DACs

Abstract

This paper introduces a new digital adaptive background technique to jointly compensate for the analog impairments of the frequency and time-interleaved sections of jointly frequency-time interleaved digital-to-analog converters. This architecture consists of a hierarchical structure of lower bandwidth converters organized as time-interleaved at the bottom and frequency-interleaved at the top. This system design emerges as a natural candidate to achieve the extreme specifications of applications such as next-generation optical communication systems, which will require converters with bandwidths in the 120 GHz range, sampling rates of about 300 GHz, and $\ge 6.5$ effective number of bits. The compensation or calibration of analog impairments in this architecture is a new challenge that has not been addressed by prior research. In this work, we present an adaptive background algorithm that simultaneously estimates and compensates for the linear impairments of the hierarchical structure. We demonstrate the effectiveness of the proposed method through numerical simulations of a coherent optical transceiver at a symbol rate of 160 GBd. In addition, we prove this device to be effective as a general-purpose converter. Our results show that the compensated architecture is an excellent candidate for high-speed commercial devices for multiple applications.

Keywords

• Background compensation
• digital-to-analog converter (DAC)
• error-backpropagation
• filter bank
• frequency-interleaving (FI)
• high-speed transmitter